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(a) Our wafer will be
Mask aligner is used to:
I. Alignment of wafer to mask II. Coat photoresist on wafer III. Expose the coated wafer IV. Developing
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MEMS
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An oxide coated silicon wafer is patterned (circle of 30 µm diameter) using photolithography and is dipped in HF. After 2
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asked by
MEMS
525 views
A p-n junction is to be created by diffusing boron (B) into an n-type silicon wafer with an existing carrier concentration of
1 answer
asked by
Andrea
610 views
Which one of this option shows the correct alignment of alignment marks on wafer and mask? [Consider blue marks as alignment
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asked by
MEMS
492 views
our wafer will be doped with phosphorus to a conc. at which the material exhibits extrinsic behaviour.
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asked by
himani.
476 views
the silicon wafer is coated with a layer of metallic aluminium which acts as an electrical contact.
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himani.
396 views
the silicon wafer is coated with a layer of metallic aluminium which acts as a electric contact.
1 answer
asked by
himani.
351 views
A p-n junction is to be created by diffusing boron into an n-type silicon wafer with an existing carrier conc.
3 answers
asked by
himani.
482 views
An oxide layer is grown on silicon wafer by dry oxidation. The layer is coated with negative photoresist. The mask is shown in
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asked by
Anonymous
169 views
The Gaussian error function can be approximated for small values of x as erf(x)≈x. Suppose a silicon wafer is exposed to
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asked by
Andrea
716 views