Question

The clock signal for timer TIM7 is 80 MHz. Determine timer overflow period (Toverflow) for the following values of TIM7_PSC and TIM7_ARR registers.
TIM7_PSC = 799
TIM7_ARR = 1999

My Answer:
80 MHz = 80000000 Hz
TC = 1 / FC
TC = 1 / 80000000 Hz
TC = 1.25 ns = 1.25 x 10 ^ -9s

Toverflow = (ARR + 1) x TC
Toverflow = (1999+1) x 1.25 x 10 ^ -9s
Toverflow = 2000 x 1.25 x 10^-9s
Toverflow = 2.5 x 10 ^-6s

Is my answer correct?

Answer 1

Your calculation is almost correct, but there's a key element that you missed with regard to the prescaler (PSC) that affects the timer's clock frequency.

1. The original clock frequency of TIM7 is 80 MHz, which you've correctly converted into:
\[
F_C = 80\, \text{MHz} = 80\, \times 10^6\, \text{Hz}
\]

2. The timer prescaler (TIM7_PSC) of 799 will divide this clock frequency by (PSC + 1):
\[
F_{timer} = \frac{F_C}{TIM7_{PSC} + 1} = \frac{80\, \times 10^6}{799 + 1} = \frac{80\, \times 10^6}{800} = 100,000\, \text{Hz} = 100\, \text{Hz}
\]

3. Then, you calculate the timer's clock period (TC) as:
\[
T_C = \frac{1}{F_{timer}} = \frac{1}{100\, \text{Hz}} = 0.01\, \text{s} = 10\, \text{ms}
\]

4. Now you calculate the overflow period (Toverflow) using the ARR value (1999):
\[
T_{overflow} = (TIM7_{ARR} + 1) \cdot T_C = (1999 + 1) \cdot 0.01\, \text{s} = 2000 \cdot 0.01\, \text{s} = 20\, \text{s}
\]

So, the correct value for the timer overflow period \( T_{overflow} \) is:

\[
T_{overflow} = 20\, \text{s}
\]

In conclusion, the correct answer for the timer overflow period is **20 seconds**. You made a misstep by not accounting for the prescaler properly.