#1. BCD to 7-Segment Decoder:
Logical Circuit Design:
- Use 4 input lines (DCBA) representing the BCD input.
- Use 7 output lines (g, f, e, d, c, b, a) representing the segments of the 7-segment display.
- Design the logical circuit as follows:
- Set g = ~(D + B + C)
- Set f = ~(~B + ~C + A + ~D)
- Set e = ~(~B + ~C + D)
- Set d = ~(D + ~B + ~C)
- Set c = ~(~C + D)
- Set b = ~(B + ~C + ~D)
- Set a = ~(A + ~D)
Truth Table:
_____________________________________________________
| D | C | B | A | g | f | e | d | c | b | a |
|________|_________|_________|_________|___|___|___|___|___|___|___|
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |
| 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 |
| 0 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 |
| 1 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 |
| 1 | 0 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
| 1 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 |
| 1 | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 | 0 |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
|________|_________|_________|_________|___|___|___|___|___|___|___|
#2. Up Counter:
Logical Circuit Design:
- Use flip-flops (e.g., D flip-flops) to store the count.
- Use combinational logic gates to generate the next count based on the current count.
- Connect the output of each flip-flop to the input of the next flip-flop in a cascade configuration.
Truth Table:
________________________
| Q2 | Q1 | Q0 |
|_________|________|________|
| 0 | 0 | 0 |
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
| 1 | 1 | 1 |
|_________|________|________|
#3. Magnitude Comparator:
Logical Circuit Design:
- Use logic gates (e.g., AND, OR, XOR) to compare each bit of numbers A and B.
- Determine if A < B, A > B, or A = B based on the comparison of each bit.
Truth Table:
_________________________________________
| A | B | A < B | A > B | A = B |
|_______|_______|_________|_________|_______|
| 0 | 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 | 0 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 1 | 0 | 0 | 1 |
|_______|_______|_________|_________|_______|
#4. Flip Flop:
Block Diagram:
-----------------------------------------
| _______ ___________ _______ |
| | | | | | | |
|-->| |->| |->| |-->|
| | | | | | | |
|-->| |->| |->| |-->|
| |_______| |___________| |_______| |
-----------------------------------------
Logical Circuit Diagram:
____________________
| _______ |
| Qn | | |
|----->| D | |
| |_______| |
| |
| Qn+1 _______ |
|------> | ||
| | C ||
| |_______||
--------------------
General Truth Table:
______________________
| C | D | Qn+1 | Qn |
|_____|_____|______|____|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | - | - |
|_____|_____|______|____|
#1. design a BCD to 7-Segment decoder
[Hint: Draw the logical circuit with the corresponding truth table which has 4-bit (DCBA) and when output g,f,e,d, c, b, a]
#2 design an up counter with any convenient Logic designs techniques
#3. Design a magnitude Comparator with takes a random numbers A and B as an input and generates a result as A<B,A>B or A = B.
#4. Draws the block diagram & logical circuit diagrams a Long With their general truth table for the following "flip felpe
1 answer
1 answer